Electronic Design

Design-For-Test The Smart Way: dFT With A "Big T" And A "Little d"

Design-for-test, or DFT, should facilitate high-quality test, not change the design. Test techniques and strategies need to supply a high-quality test that screens out defective devices, avoiding ...

Engineering AI Is Redefining Product Design as Teams Test Nearly 4x More Design Options

SimScale, the world's first AI-native cloud engineering simulation platform, today released its 2026 State of Engineering AI Report. The report reveals how AI is reshaping engineering design and ...
Electronic Design

ATE – Design for Test – Putting Memory to the Test in Nanometer Designs

Memory test at-speed isn't easy but can be achieved by balancing test selection, area overhead, and test-time constraints. The semiconductor industry has intensified its focus on yield issues to meet ...
EDN

Smart test for nanometer designs

When semiconductor devices had geometries of 0.18 microns and larger, most defects manifested themselves as static faults. Test strategies based on stuck-at fault-model scan patterns and standard ...
EDN

Tools for testing mixed-signal designs

Striking out across the DesignCon Exhibit Hall in Santa Clara on February 2nd, I stopped at the LeCroy booth and spoke with Dan Monopoli, a Product Marketing Manager for the company in from Chestnut ...